Theory of Transparent BIST for RAMs
IEEE Transactions on Computers
Static and dynamic behavior of memory cell array opens and shorts in embedded DRAMs
Proceedings of the conference on Design, automation and test in Europe
Using March Tests to Test SRAMs
IEEE Design & Test
High volume microprocessor test escapes, an analysis of defects our tests are missing
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Testing for resistive opens and stuck opens
Proceedings of the IEEE International Test Conference 2001
Integration of Non-Classical Faults in Standard March Tests
MTDT '98 Proceedings of the 1998 IEEE International Workshop on Memory Technology, Design and Testing
Functional Memory Faults: A Formal Notation and a Taxonomy
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
Testing Static and Dynamic Faults in Random Access Memories
VTS '02 Proceedings of the 20th IEEE VLSI Test Symposium
Defect-Based Delay Testing of Resistive Vias-Contacts A Critical Evaluation
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Defect-Oriented Dynamic Fault Models for Embedded-SRAMs
ETW '03 Proceedings of the 8th IEEE European Test Workshop
Dynamic Read Destructive Fault in Embedded-SRAMs: Analysis and March Test Solution
ETS '04 Proceedings of the European Test Symposium, Ninth IEEE
Defect Analysis and Defect Tolerant Design of Multi-port SRAMs
Journal of Electronic Testing: Theory and Applications
Study of Read Recovery Dynamic Faults in 6T SRAMS and Method to Improve Test Time
Journal of Electronic Testing: Theory and Applications
Detecting stability faults in sub-threshold SRAMs
Proceedings of the International Conference on Computer-Aided Design
Impact of Resistive-Bridging Defects in SRAM at Different Technology Nodes
Journal of Electronic Testing: Theory and Applications
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Resistive-open defects appear more and more frequently in VDSM technologies. In this paper we present a study concerning resistive-open defects in the core-cell of SRAM memories. The first target of this work is a comparison of the effect produced by resistive-open defects in the 0.13 μm and 90 nm core-cell. We show that the 90 nm core-cell is more robust than the 0.13 μm core-cell in presence of resistive-open defects. On the other hand we show that dynamic faults are most likely to occur in the 90 nm than in 0.13 μm core-cell. Finally we propose a unique March test solution that ensures the complete coverage of all the extracted fault models for both technologies.