Dynamic Read Destructive Fault in Embedded-SRAMs: Analysis and March Test Solution

Authors:
Luigi Dilillo;Patrick Girard;Serge Pravossoudovitch;Arnaud Virazel;Simone Borri;Magali Hage-Hassan
Affiliations:
Université de Montpellier II / CNRS, France;Université de Montpellier II / CNRS, France;Université de Montpellier II / CNRS, France;Université de Montpellier II / CNRS, France;Infineon Technologies France;Infineon Technologies France
Venue:
ETS '04 Proceedings of the European Test Symposium, Ninth IEEE
Year:
2004

Citing 0
Cited 6

Analysis of Dynamic Faults in Embedded-SRAMs: Implications for Memory Test

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Resistive-open defect injection in SRAM core-cell: analysis and comparison between 0.13 μm and 90 nm technologies

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Minimal March Tests for Detection of Dynamic Faults in Random Access Memories

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Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits

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Defect Analysis and Defect Tolerant Design of Multi-port SRAMs

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A new design-for-test technique for SRAM core-cell stability faults

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Abstract

This paper presents an analysis of dynamic faults in core-cell of SRAM memories. These faults are the consequence of resistive-open defects that appear more frequently in VDSM technologies. In particular, the study concentrates on those defects that generate dynamic Read Destructive Faults, dRDFs. In this paper, we demonstrate that read or write operations on a cell involve a stress on the other cells of the same word line. This stress, called Read Equivalent Stress (RES), has the same effect than a read operation. On this basis, we propose to modify the well known March C-, which does not detect dRDFs, into a new version able to detect them. This is obtained by changing its addressing order with the purpose of producing the maximal number of RES. This modification does not change the complexity of the algorithm and its capability to detect the former target faults.