Dynamic Faults in Random-Access-Memories: Concept, Fault Models and Tests
Journal of Electronic Testing: Theory and Applications
Memory Fault Modeling Trends: A Case Study
Journal of Electronic Testing: Theory and Applications
Analysis of Dynamic Faults in Embedded-SRAMs: Implications for Memory Test
Journal of Electronic Testing: Theory and Applications
Proceedings of the 42nd annual Design Automation Conference
Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories
Journal of Electronic Testing: Theory and Applications
Crosstalk Induced Fault Analysis and Test in DRAMs
Journal of Electronic Testing: Theory and Applications
Minimal March Tests for Detection of Dynamic Faults in Random Access Memories
Journal of Electronic Testing: Theory and Applications
A design-for-diagnosis technique for SRAM write drivers
Proceedings of the conference on Design, automation and test in Europe
Test set development for cache memory in modern microprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Impact of Resistive-Bridging Defects in SRAM at Different Technology Nodes
Journal of Electronic Testing: Theory and Applications
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The ever increasing trend to reduce DPM levels of memories requires tests with very high fault coverages. The very important class of dynamic fault, therefore cannot be ignored any more. It will be shown in this paper that conventional memory tests constructed to detect the static faulty behavior of a specific defect do not necessarily detect its dynamic faulty behavior; which has been shown to exist. The dynamic fault behavior can take place in the absence of the static fault behavior. The paper therefore also presents new memory tests derived to target the dynamic fault class.