Memory Fault Modeling Trends: A Case Study

Authors:
Said Hamdioui;Rob Wadsworth;John Delos Reyes;Ad J. Van De Goor
Affiliations:
Delft University of Technology, Faculty of Electrical Engineering, Mathematic and Computer Science, Computer Engineering Laboratory, Mekelweg 4, 2628 CD Delft, The Netherlands/ Intel Corporation, ...;STMicroelectronics, 850 rue Jean Monnet BP 16, F-38926 CROLLES Cedex, France;Intel Corporation, 2200 Mission College Boulevard, Santa Clara, CA 95052, USA;Delft University of Technology, Faculty of Electrical Engineering, Mathematic and Computer Science, Computer Engineering Laboratory, Mekelweg 4, 2628 CD Delft, The Netherlands
Venue:
Journal of Electronic Testing: Theory and Applications
Year:
2004

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Abstract

This paper presents two new march test algorithms, MT-R3CF and MT-R4CF, for detecting reduced 3-coupling and 4-coupling faults, respectively, in n × 1 random-access memories (RAMs). To reduce the length of the tests, only the ...