Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
Hierarchical fault modeling for linear analog circuits
Analog Integrated Circuits and Signal Processing - Special issue: modeling and simulation of mixed analog-digital systems
Embedded DRAM technology opportunities and challenges
IEEE Spectrum
The Behavior and Testing Implications of CMOS IC Logic Gate Open Circuits
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
How we test Siemens Embedded DRAM Cores
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Impact of memory cell array bridges on the faulty behavior in embedded DRAMs
ATS '00 Proceedings of the 9th Asian Test Symposium
March LA: a test for linked memory faults
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Functional Memory Faults: A Formal Notation and a Taxonomy
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
Dynamic Faults in Random-Access-Memories: Concept, Fault Models and Tests
Journal of Electronic Testing: Theory and Applications
Static and Dynamic Behavior of Memory Cell Array Spot Defects in Embedded DRAMs
IEEE Transactions on Computers
Simulation Based Analysis of Temperature Effect on the Faulty Behavior of Embedded DRAMs
ITC '01 Proceedings of the 2001 IEEE International Test Conference
Soft Faults and the Importance of Stresses in Memory Testing
Proceedings of the conference on Design, automation and test in Europe - Volume 2
March iC-: An Improved Version of March C- for ADOFs Detection
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
New Test Methodology for Resistive Open Defect Detection in Memory Address Decoders
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
Memory Fault Modeling Trends: A Case Study
Journal of Electronic Testing: Theory and Applications
Analysis of Dynamic Faults in Embedded-SRAMs: Implications for Memory Test
Journal of Electronic Testing: Theory and Applications
Proceedings of the 42nd annual Design Automation Conference
Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories
Journal of Electronic Testing: Theory and Applications
Automatic march tests generations for static linked faults in SRAMs
Proceedings of the conference on Design, automation and test in Europe: Proceedings
ADOFs and Resistive-ADOFs in SRAM Address Decoders: Test Conditions and March Solutions
Journal of Electronic Testing: Theory and Applications
Slow write driver faults in 65nm SRAM technology: analysis and March test solution
Proceedings of the conference on Design, automation and test in Europe
Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits
Journal of Electronic Testing: Theory and Applications
Defect Analysis and Defect Tolerant Design of Multi-port SRAMs
Journal of Electronic Testing: Theory and Applications
A design-for-diagnosis technique for SRAM write drivers
Proceedings of the conference on Design, automation and test in Europe
Test set development for cache memory in modern microprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Study of Read Recovery Dynamic Faults in 6T SRAMS and Method to Improve Test Time
Journal of Electronic Testing: Theory and Applications
Analysis of Resistive Open Defects in Drowsy SRAM Cells
Journal of Electronic Testing: Theory and Applications
| Hi-index | 0.00 |