Dynamic Faults in Random-Access-Memories: Concept, Fault Models and Tests

Authors:
Said Hamdioui;Zaid Al-Ars;Ad J. Van De Goor;Mike Rodgers
Affiliations:
Intel Corporation, 2200 Mission College Boulevard, Santa Clara, CA 95052, USA&semi/ Section of Computer Engineering, Faculty of Information Technology and Systems, Delft University of Technology, ...;Section of Computer Engineering, Faculty of Information Technology and Systems, Delft University of Technology, Mekelweg 4, 2628 CD Delft, The Netherlands;Section of Computer Engineering, Faculty of Information Technology and Systems, Delft University of Technology, Mekelweg 4, 2628 CD Delft, The Netherlands;Intel Corporation, 2200 Mission College Boulevard, Santa Clara, CA 95052, USA
Venue:
Journal of Electronic Testing: Theory and Applications
Year:
2003

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Abstract

The ever increasing trend to reduce DPM levels of memories requires tests with very high fault coverage and low cost. This paper describes an important fault class, called dynamic faults, that cannot be ignored anymore. The dynamic fault behavior can take place in the absence of the static fault behavior, for which the conventional memory tests have been constructed. The concept of dynamic fault will be established and validated for both dynamic and static Random-Access-Memories. A systematic way to develop fault models for dynamic faults will be introduced. Further, it will be shown that conventional memory tests do not necessarily detect its dynamic faulty behavior, which has been shown to exist in real designs. The paper therefore also presents new memory tests to target the dynamic fault class.