Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
Deterministic tests for detecting single V-coupling faults in RAMs
Journal of Electronic Testing: Theory and Applications
Using March Tests to Test SRAMs
IEEE Design & Test
Deterministic tests for detecting scrambled pattern-sensitive faults in RAMs
MTDT '95 Proceedings of the 1995 IEEE International Workshop on Memory Technology, Design and Testing
March LR: a test for realistic linked faults
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
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This paper presents two new march test algorithms, MT-R3CF and MT-R4CF, for detecting reduced 3-coupling and 4-coupling faults, respectively, in n × 1 random-access memories (RAMs). To reduce the length of the tests, only the coupling faults between physically adjacent memory cells have been considered. The tests assume that the storage cells are arranged in a rectangular grid and that the mapping from logical addresses to physical cell locations is known completely. The march tests need 30n and 41n operations, respectively. In this paper any memory fault is modelled by a set of primitive memory faults called simple faults. We prove, using an Eulerian graph model, the ability of the test algorithms to detect all simple coupling faults. This paper also includes a study regarding the ability of the test MT-R3CF to detect interacting linked 3-coupling faults. This work improves the results presented in [1] where a similar model of reduced 3-coupling faults has been considered and a march test with 38n operations has been proposed. To compare these new march tests with other published tests, simulation results are presented in this paper.