Jitter Models for the Design and Test of Gbps-Speed Serial Interconnects
IEEE Design & Test
Broadband Impedance Matching for Inductive Interconnect in VLSI Packages
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Bus stuttering: an encoding technique to reduce inductive noise in off-chip data transmission
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Packaging a 40-Gbps Serial Link Using a Wire-Bonded Plastic Ball Grid Array
IEEE Design & Test
High performance on-chip differential signaling using passive compensation for global communication
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
A computer-aided design tool for the analysis of electrical-connector transmission lines
International Journal of Computer Applications in Technology
Intersignal timing skew compensation of parallel links with voltage-mode incremental signaling
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Development of a concept inventory test for signal and power integrity in electronic design
FIE'09 Proceedings of the 39th IEEE international conference on Frontiers in education conference
Using Evolutionary Algorithms for Signal Integrity Assessment of High-Speed Data Buses
Journal of Electronic Testing: Theory and Applications
What is the design challenge for on-chip speed-of-light communication?
ACM SIGDA Newsletter
What is the design challenge for on-chip speed-of-light communication?
ACM SIGDA Newsletter
Accelerated Publication: VLSI MOSFETs lifetime reduction caused by impedance mismatch
Microelectronic Engineering
Simul-EMI II: an application to simulate electric and magnetic phenomena in PCB designs
IEA/AIE'10 Proceedings of the 23rd international conference on Industrial engineering and other applications of applied intelligent systems - Volume Part I
Analytical test buffer design for differential signaling I/O buffers by error syndrome analysis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Analysis and modeling of signal integrity problems in the serial communication devices
MMES'10 Proceedings of the 2010 international conference on Mathematical models for engineering science
Microelectronic Engineering
A design-oriented methodology for accurate modeling of on-chip interconnects
Analog Integrated Circuits and Signal Processing
A nanotechnology enhancement to Moore's law
Applied Computational Intelligence and Soft Computing
A nanotechnology enhancement to moore's law
Applied Computational Intelligence and Soft Computing
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Raves for Dr. Johnson's previous classic, High-Speed Digital Design!In High-Speed Signal Propagation, Howard Johnson and Martin Graham bring together state-of-the-art techniques for building digital interconnections that can transmit faster, farther, and more efficiently than ever before. Packed with new examples and never-before-published high-speed design guidance, this book offers a complete and unified theory of signal propagation for all metallic media, from cables to pcb traces to chips. Coverage includes: Managing tradeoffs between speed and distance Physical theory of signal impairments: skin and proximity effects, dielectric loss, surface roughness, and non-TEM mode propagation Generalized frequency- and step-response models Calculation of time-domain waveforms from frequency-domain transfer functions Differential signaling: Edge-coupled and broadside-coupled differential pairs, bends, intra-pair skew, differential trace geometry impedance, crosstalk, and radiation Inter-cabinet connections: Coax, twisted-pair, fiber, equalizers, and LAN building wiring Clock distribution: Special requirements, repeaters, multi-drop clock distribution, jitter, and power filtering Simulation: Frequency domain simulation methods, Spice, and IBIS