Logic design principles with emphasis on testable semicustom circuits
Logic design principles with emphasis on testable semicustom circuits
On the Complexity of Mod-2l Sum PLA's
IEEE Transactions on Computers
Electronic logic systems (3rd ed.)
Electronic logic systems (3rd ed.)
Easily Testable Realizations for Generalized Reed-Muller Expressions
IEEE Transactions on Computers
Improving the memory-system performance of sparse-matrix vector multiplication
IBM Journal of Research and Development
A Method for Modulo-2 Minimization
IEEE Transactions on Computers - Lecture notes in computer science Vol. 174
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In this paper we present two algorithms, which can be used in converting between product of sum (POS) and fixed polarity dual Reed_Muller (FPDRM) and find the optimal polarity for large number of variables. The first algorithm is used to compute the coefficients of FPDRM directly from the truth table of POS. This algorithm is also used to compute the coefficients of POS from FPDRM. The second algorithm will find the optimal polarity among the 2n different polarities for large n-variable functions, without generating all of the polarity sets. This algorithm is based on separating the truth vector of POS and the use of sparse techniques, which will lead to the optimal polarity. Time efficiency and computing speed are thus achieved in this technique.