Model Checking and Preprocessing

Authors:
Andrea Ferrara;Paolo Liberatore;Marco Schaerf
Affiliations:
Dipartimento di Informatica e Sistemistica, Università di Roma "La Sapienza", Via Salaria 113, Roma, Italia;Dipartimento di Informatica e Sistemistica, Università di Roma "La Sapienza", Via Salaria 113, Roma, Italia;Dipartimento di Informatica e Sistemistica, Università di Roma "La Sapienza", Via Salaria 113, Roma, Italia
Venue:
AI*IA '07 Proceedings of the 10th Congress of the Italian Association for Artificial Intelligence on AI*IA 2007: Artificial Intelligence and Human-Oriented Computing
Year:
2007

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Abstract

Temporal Logic Model Checking is a verification method having many industrial applications. This method describes a system as a formal structure called model; some properties, expressed in a temporal logic formula, can be then checked over this model. In order to improve performance, some tools allow to preprocessing the model so that a set of properties can be verified reusing the same preprocessed model. In this article, we prove that this preprocessing cannot possibly reduce complexity, if its result is bound to be of size polynomial in the size of the input. This result also holds if the formula is the part of the data that is preprocessed, which has similar practical implications.