Matrix analysis
A comparison of multivariate normal generators
Communications of the ACM
Variance reduction techniques for value-at-risk with heavy-tailed risk factors
Proceedings of the 32nd conference on Winter simulation
A Novel 2D Filter Design Methodology for Heterogeneous Devices
FCCM '05 Proceedings of the 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A Hardware Gaussian Noise Generator Using the Box-Muller Method and Its Error Analysis
IEEE Transactions on Computers
Gaussian random number generators
ACM Computing Surveys (CSUR)
Sampling from the Multivariate Gaussian Distribution using Reconfigurable Hardware
FCCM '07 Proceedings of the 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A hardware gaussian noise generator using the wallace method
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Word-Length Optimization and Error Analysis of a Multivariate Gaussian Random Number Generator
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
An Optimized Hardware Architecture of a Multivariate Gaussian Random Number Generator
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Design of a financial application driven multivariate gaussian random number generator for an FPGA
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
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Financial applications are one of many fields where a multivariate Gaussian random number generator plays a key role in performing computationally extensive simulations. Recent technological advances and today's requirements have led to the migration of the traditional software based multivariate Gaussian random number generator to a hardware based model. Field Programmable Gate Arrays (FPGA) are normally used as a target device due to their fine grain parallelism and reconfigurability. As well as the ability to achieve designs with high throughput it is also desirable to produce designs with the flexibility to control the resource usage in order to meet given resource constraints. This paper proposes an algorithm for a multivariate Gaussian random number generator implementation in an FPGA given a set of resources to be utilized. Experiments demonstrate the proposed algorithm's capability of producing a design that meets any given resource constraints.