Goodness-of-fit techniques
A fast normal random number generator
ACM Transactions on Mathematical Software (TOMS)
Fast pseudorandom generators for normal and exponential variates
ACM Transactions on Mathematical Software (TOMS)
Maximally equidistributed combined Tausworthe generators
Mathematics of Computation
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
Design of High Speed AWGN Communication Channel Emulator
Analog Integrated Circuits and Signal Processing
Implementation of Near Shannon Limit Error-Correcting Codes Using Reconfigurable Hardware
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Continuous random variate generation by fast numerical inversion
ACM Transactions on Modeling and Computer Simulation (TOMACS)
A Versatile High Speed Bit Error Rate Testing Scheme
ISQED '04 Proceedings of the 5th International Symposium on Quality Electronic Design
A Gaussian Noise Generator for Hardware-Based Simulations
IEEE Transactions on Computers
A Hardware Gaussian Noise Generator Using the Box-Muller Method and Its Error Analysis
IEEE Transactions on Computers
Multivariate Gaussian Random Number Generation Targeting Reconfigurable Hardware
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Multivariate Gaussian Random Number Generator Targeting Specific Resource Utilization in an FPGA
ARC '08 Proceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and Applications
A compact and accurate Gaussian variate generator
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
FPGA-based low-complexity high-throughput tri-mode decoder for quasi-cyclic LDPC codes
Allerton'09 Proceedings of the 47th annual Allerton conference on Communication, control, and computing
Design and FPGA implementation an accurate real time 3x4 MIMO channel emulator
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
An Optimized Hardware Architecture of a Multivariate Gaussian Random Number Generator
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
FPGA Acceleration of MultiFactor CDO Pricing
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
A hardware efficient random number generator for nonuniform distributions with arbitrary precision
International Journal of Reconfigurable Computing - Special issue on Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10)
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We describe a hardware Gaussian noise generator based on the Wallace method used for a hardware simulation system. Our noise generator accurately models a true Gaussian probability density function even at high values. We evaluate its properties using: 1) several different statistical tests, including the chi-square test and the Anderson-Darling test and 2) an application for decoding of low-density parity-check (LDPC) codes. Our design is implemented on a Xilinx Virtex-II XC2V4000-6 field-programmable gate array (FPGA) at 155 MHz; it takes up 3% of the device and produces 155 million samples per second, which is three times faster than a 2.6-GHz Pentium-IV PC. Another implementation on a Xilinx Spartan-III XC3S200E-5 FPGA at 106 MHz is two times faster than the software version. Further improvement in performance can be obtained by concurrent execution: 20 parallel instances of the noise generator on an XC2V4000-6 FPGA at 115 MHz can run 51 times faster than software on a 2.6-GHz Pentium-IV PC.