Practical low-cost CPL implementations threshold logic functions
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
Principles in the Evolutionary Design of Digital Circuits—Part I
Genetic Programming and Evolvable Machines
ICES '00 Proceedings of the Third International Conference on Evolvable Systems: From Biology to Hardware
ICES '01 Proceedings of the 4th International Conference on Evolvable Systems: From Biology to Hardware
Towards the Automatic Design of More Efficient Digital Circuits
EH '00 Proceedings of the 2nd NASA/DoD workshop on Evolvable Hardware
Evolvable hardware techniques for on-chip automated reconfiguration of programmable devices
Soft Computing - A Fusion of Foundations, Methodologies and Applications
Genetic Programming and Evolvable Machines
Promises and challenges of evolvable hardware
IEEE Transactions on Systems, Man, and Cybernetics, Part C: Applications and Reviews
Graph-based evolutionary design of arithmetic circuits
IEEE Transactions on Evolutionary Computation
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An evolutionary algorithm is used to design digital circuits at the transistor level. In particular, various static CMOS circuits with up to four inputs were evolved. The increase in the complexity of evolved circuits wrt existing circuits evolved at the transistor level is primarily caused by two phenomena: the usage of a specialized circuit simulator and restriction of the search space. Because we restricted the search space to the set of "reasonable designs" we could employ imperfect, but very fast circuit simulation. The usage of proposed simulator allowed exploring more candidate designs than a conventional Spice-based approach. However, in some cases, an incorrect behavior was detected after validation of evolved circuits using Spice simulator.