Measuring Architectural Vulnerability Factors

Authors:
Shubhendu S. Mukherjee;Christopher T. Weaver;Joel Emer;Steven K. Reinhardt;Todd Austin
Affiliations:
Intel;Intel, University of Michigan;Intel;Intel, University of Michigan;University of Michigan
Venue:
IEEE Micro
Year:
2003

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Abstract

Processor designers need accurate estimates of soft-error rates early in the design cycle to make appropriate cost-reliability tradeoffs. Here, the authors present a method for estimating the architectural vulnerability factor—the probability that a fault in a particular structure will result in an error.