A Trojan-resistant system-on-chip bus architecture
MILCOM'09 Proceedings of the 28th IEEE conference on Military communications
Compromise through USB-based Hardware Trojan Horse device
Future Generation Computer Systems
Power fingerprinting in SDR integrity assessment for security and regulatory compliance
Analog Integrated Circuits and Signal Processing
Experimental analysis of a ring oscillator network for hardware trojan detection in a 90nm ASIC
Proceedings of the International Conference on Computer-Aided Design
Reverse engineering digital circuits using functional analysis
Proceedings of the Conference on Design, Automation and Test in Europe
Detection of trojans using a combined ring oscillator network and off-chip transient power analysis
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Hardware trojan design and detection: a practical evaluation
Proceedings of the Workshop on Embedded Systems Security
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This paper addresses a new threat to the security of integrated circuits (ICs). The migration of IC fabrication to untrusted foundries has made ICs vulnerable to malicious alterations, that could, under specific conditions, result infunctional changes and/or catastrophic failure of the system in which they are embedded. Such malicious alternations and inclusions are referred to as Hardware Trojans. In this paper, we propose a current integration methodology to observe Trojan activity in the circuit and a localized current analysis approach to isolate the Trojan. Our simulation results considering process variations show that with a very small number of clock cycles the method can detect hardware Trojans as small as few gates without fully activating them. However, for very small Trojan circuits with less than few gates, process variations could negatively impact the detection and isolation process.