Towards a methodology for analysis of interconnect structures for 3D-integration of micro systems

Authors:
Peter Schneider;Sven Reitz;Andreas Wilde;Günter Elst;Peter Schwarz
Affiliations:
Fraunhofer Institute for Integrated Circuits, Branch Lab Design Automation, Dresden, Germany;Fraunhofer Institute for Integrated Circuits, Branch Lab Design Automation, Dresden, Germany;Fraunhofer Institute for Integrated Circuits, Branch Lab Design Automation, Dresden, Germany;Fraunhofer Institute for Integrated Circuits, Branch Lab Design Automation, Dresden, Germany;Fraunhofer Institute for Integrated Circuits, Branch Lab Design Automation, Dresden, Germany
Venue:
Analog Integrated Circuits and Signal Processing
Year:
2008

Citing 4
Cited 0

3D Chip Stack Technology Using Through-Chip Interconnects

IEEE Design & Test
Placement and Routing in 3D Integrated Circuits

IEEE Design & Test
Physical Design for 3D System on Package

IEEE Design & Test
Modular parametric finite element modelling for reliability-studies in electronic and MEMS packaging

DTIP '03 Proceedings of the Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS

Quantified Score

Hi-index	0.00

Visualization

Abstract

Functional aspects as well as the influence of integration technology on the system behavior have to be considered in the 3D integration design process of micro systems. Therefore, information from different physical domains has to be provided to designers. Due to the variety of structures and effects of different physical domains, efficient modeling approaches and simulation algorithms have to be combined. The article describes a modular approach which covers detailed analysis with PDE solvers and model generation for system level simulation.