3D Chip Stack Technology Using Through-Chip Interconnects

  • Authors:
  • Peter Benkart;Alexander Kaiser;Andreas Munding;Markus Bschorr;Hans-Joerg Pfleiderer;Erhard Kohn;Arne Heittmann;Holger Huebner;Ulrich Ramacher

  • Affiliations:
  • Infineon Technologies and University of Ulm;University of Ulm;University of Ulm;University of Ulm;University of Ulm;University of Ulm;Infineon Technologies;Infineon Technologies;Infineon Technologies

  • Venue:
  • IEEE Design & Test
  • Year:
  • 2005

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Abstract

A key enabler for 3D technologies is the ability to stack chips and buildinterconnects that connect circuitry in different layers of the stack. This articlepresents a technology overview of how to achieve this goal in a 3D fabricationprocess. It also shows measurements for characterizing these interconnects.