Soft-error resilience of the IBM POWER6 processor input/output subsystem

Authors:
C. Bender;P. N. Sanda;P. Kudva;R. Mata;V. Pokala;R. Haraden;M. Schallhorn
Affiliations:
IBM Systems and Technology Group, Poughkeepsie, New York;IBM Systems and Technology Group, Poughkeepsie, New York;IBM Research Division, Thomas J. Watson Research Center, Yorktown Heights, New York;IBM Systems and Technology Group, Austin, Texas;IBM Systems and Technology Group, Austin, Texas;IBM Systems and Technology Group, Rochester, Minnesota;IBM Systems and Technology Group, Rochester, Minnesota
Venue:
IBM Journal of Research and Development
Year:
2008

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Abstract

The soft-error resilience of the IBM POWER6™ processor I/O (input/output) subsystem was measured using proton beam irradiation to accelerate the effect of single-event upsets. Test programs exercised each of the adapters on the chip. Error rates were measured for various cases ranging from idle to high I/O bandwidth and utilization. The POWER6 processor and I/O hub subsystem work together to maintain resiliency even under strenuous irradiation conditions.