Testability of asynchronous timed control circuits with delay assumptions

Authors:
Peter A. Beerel;Teresa H.-Y. Meng
Affiliations:
Computer Systems Laboratory, Stanford University;Computer Systems Laboratory, Stanford University
Venue:
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Year:
1991

Citing 3
Cited 2

Logic design principles with emphasis on testable semicustom circuits

Logic design principles with emphasis on testable semicustom circuits
Semi-modularity and self-diagnostic asynchronous circuits

Proceedings of the 1991 University of California/Santa Cruz conference on Advanced research in VLSI
Testing delay-insensitive circuits

Proceedings of the 1991 University of California/Santa Cruz conference on Advanced research in VLSI

Asynchronous control circuits

Logic Synthesis and Verification
Testing C-elements is not elementary

ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies

Quantified Score

Hi-index	0.00

Visualization

Abstract