Crosstalk analysis for a CMOS gate driven inductively and capacitively coupled interconnects

Authors:
B. K. Kaushik;S. Sarkar
Affiliations:
Department of Electronics and Electrical Engineering, G.B. Pant Engineering College, Pauri Garhwal-246001, Uttarakhand, India;Department of Electronics and Communication Engineering, Mody Institute of Technology and Science, Lakshmangarh 332 311, District Sikar, Rajasthan, India
Venue:
Microelectronics Journal
Year:
2008

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Abstract

This paper deals with crosstalk analysis of a CMOS driven capacitively and inductively coupled interconnect. The Alpha Power Law model of MOS transistor is used to represent a CMOS driver. This is combined with a transmission line-based coupled RLC model of interconnect to develop a composite model for analytical purpose. On this basis a transient analysis of crosstalk noise is carried out. Comparison of the analytical results with SPICE extracted results shows that the error involved is nominal.