Algebra-logical diagnosis model for SoC F-IP

Authors:
Vladimir Hahanov;Vladimir Obrizan;Eugenia Litvinova;Ka Lok Man
Affiliations:
Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine;Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine;Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine;Computer Engineering Faculty, Kharkov National University of Radioelectronics, Kharkov, Ukraine
Venue:
WSEAS Transactions on Circuits and Systems
Year:
2008

Citing 5
Cited 2

System-on-a-chip verification: methodology and techniques

System-on-a-chip verification: methodology and techniques
Writing Testbenches: Functional Verification of HDL Models, Second Edition

Writing Testbenches: Functional Verification of HDL Models, Second Edition
Guest Editors' Introduction: Design for Yield and Reliability

IEEE Design & Test
A Platform-Based Taxonomy for ESL Design

IEEE Design & Test
Miss Rate Prediction Across Program Inputs and Cache Configurations

IEEE Transactions on Computers

Datapath error detection with no detection latency for high-performance microprocessors

WSEAS Transactions on Computers
Theoretical and practical aspects for study and optimization of the aircrafts' electro energetic systems

WSEAS Transactions on Circuits and Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

Algebra-logical model, method and algorithm of fault embedded diagnosis in functional blocks of SoC are proposed. The reduced SoC Functional Intellectual Property Infrastructure that is characterized by minimal set of the embedded diagnosis processes in real time and enables to realize the services: testing of the nominal functions on basis of generable input patterns and analysis of output reactions; fault diagnosis with given resolution of fault location by means of utilization of the IEEE 1500 multiprobe; fault simulation to provide of realization of the first two procedures on basis of the fault detection table is presented.