On-chip transactional memory system for FPGAs using TCC model
Proceedings of the 6th FPGAworld Conference
Development process for clusters on a reconfigurable chip
Computers and Electrical Engineering
Redsharc: a programming model and on-chip network for multi-core systems on a programmable chip
International Journal of Reconfigurable Computing - Special issue on Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10)
Adaptive communication mechanism for accelerating MPI functions in NoC-based multicore processors
ACM Transactions on Architecture and Code Optimization (TACO)
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This paper presents an embedded FPGA–based architecture to compute navigation trajectories along a harmonic potential. The goals and obstacles may be changed during computation. Large environments are split into blocks. This approach, together ...