Redsharc: a programming model and on-chip network for multi-core systems on a programmable chip

  • Authors:
  • William V. Kritikos;Andrew G. Schmidt;Ron Sass;Erik K. Anderson;Matthew French

  • Affiliations:
  • Reconfigurable Computing Systems Laboartory, ECE Deptartment, Charlotte, NC;Reconfigurable Computing Systems Laboartory, ECE Deptartment, Charlotte, NC;Reconfigurable Computing Systems Laboartory, ECE Deptartment, Charlotte, NC;Information Sciences Institute, University of Southern California, Arlington, VA;Information Sciences Institute, University of Southern California, Arlington, VA

  • Venue:
  • International Journal of Reconfigurable Computing - Special issue on Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10)
  • Year:
  • 2012

Quantified Score

Hi-index 0.00

Visualization

Abstract

The reconfigurable data-stream hardware software architecture (Redsharc) is a programming model and network-on-a-chip solution designed to scale tomeet the performance needs ofmulti-core Systems on a programmable chip (MCSoPC). Redsharc uses an abstract API that allows programmers to develop systems of simultaneously executing kernels, in software and/or hardware, that communicate over a seamless interface. Redsharc incorporates two on-chip networks that directly implement the API to support high-performance systems with numerous hardware kernels. This paper documents the API, describes the common infrastructure, and quantifies the performance of a complete implementation. Furthermore, the overhead, in terms of resource utilization, is reported along with the ability to integrate hard and soft processor cores with purely hardware kernels being demonstrated.