Error-correcting codes for byte-organized memory systems
IEEE Transactions on Information Theory
IEEE Spectrum
A Class of Error Control Codes for Byte Organized Memory Systems -SbEC-(Sb+S)ED Codes-
IEEE Transactions on Computers
VLSI design of systematic odd-weight-column byte error detecting SEC-DED codes
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
Review: A survey of memory error correcting techniques for improved reliability
Journal of Network and Computer Applications
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A method is presented of constructing symbol error correcting codes that have a minimum symbol distance of 4. The method yields some codes that are more efficient than previously known codes. The application is to designing fault-tolerant semiconductor memories.