Design of fault-tolerant associative processors
ISCA '73 Proceedings of the 1st annual symposium on Computer architecture
Reliability modeling techniques for self-repairing computer systems
ACM '69 Proceedings of the 1969 24th national conference
Design techniques for associative memories and processors
Design techniques for associative memories and processors
Cellular Interconnection Arrays
IEEE Transactions on Computers
AFIPS '64 (Fall, part I) Proceedings of the October 27-29, 1964, fall joint computer conference, part I
Design of fault-tolerant computers
AFIPS '67 (Fall) Proceedings of the November 14-16, 1967, fall joint computer conference
A study of the data commutation problems in a self-repairable multiprocessor
AFIPS '68 (Spring) Proceedings of the April 30--May 2, 1968, spring joint computer conference
The architecture of a large associative processor
AFIPS '70 (Spring) Proceedings of the May 5-7, 1970, spring joint computer conference
An associative processor for air traffic control
AFIPS '71 (Spring) Proceedings of the May 18-20, 1971, spring joint computer conference
A highly parallel computing system for information retrieval
AFIPS '72 (Fall, part II) Proceedings of the December 5-7, 1972, fall joint computer conference, part II
IEEE Transactions on Computers
Approaches to computer reliability: then and now
AFIPS '76 Proceedings of the June 7-10, 1976, national computer conference and exposition
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Associative processing techniques have been suggested for numerous application areas and have been proven to be superior to more conventional procedures for a number of specialized applications. Recent advances in computer technology and development of new architectural concepts for associative devices have made the design of larger and more flexible systems possible. Such systems are extremely complex and must be adequately protected against failures. This paper reports on the results of a study which has indicated the techniques that are applicable and difficulties that may be encountered in the design of fault-tolerant associative processors.