Heterogeneous Architecture Exploration: Analysis vs. Parameter Sweep

Authors:
Asma Kahoul;George A. Constantinides;Alastair M. Smith;Peter Y. Cheung
Affiliations:
Department of Electrical & Electronic Engineering, Imperial College London, London, United Kingdom SW7 2BT;Department of Electrical & Electronic Engineering, Imperial College London, London, United Kingdom SW7 2BT;Department of Electrical & Electronic Engineering, Imperial College London, London, United Kingdom SW7 2BT;Department of Electrical & Electronic Engineering, Imperial College London, London, United Kingdom SW7 2BT
Venue:
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
Year:
2009

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Abstract

This paper argues the case for the use of analytical models in FPGA architecture layout exploration. We show that the problem when simplified, is amenable to formal optimization techniques such as integer linear programming. However, the simplification process may lead to inaccurate models. To test the overall methodology, we combine the resulting layouts with VPR 5.0. Our results show that the resulting architectures are better than those found using traditional parameter sweeping techniques.