Temperature-aware microarchitecture: Modeling and implementation
ACM Transactions on Architecture and Code Optimization (TACO)
Using Performance Counters for Runtime Temperature Sensing in High-Performance Processors
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 11 - Volume 12
Thermal via placement in 3D ICs
Proceedings of the 2005 international symposium on Physical design
Hotspot: acompact thermal modeling methodology for early-stage VLSI design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
3-D Thermal-ADI: a linear-time chip level transient thermal simulator
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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A significant increase in power density in modern nano-electronic VLSI circuits has lead to increased localized heating and generation of hot spots. These temperature effects can lead to reliability and performance problems. This paper presents a novel design time temperature aware methodology which consists of using additional routing known as Heat Pipes, to transfer heat from hot to cold regions. In order to evaluate the effect of Heat Pipes, a thermal model to simulate effect of metal interconnect on heat distribution is also developed. Results show a 5% to 7% decrease in temperature variation through-out and 2 to 3 degree reduction in hotspot temperature as a result of Heat Pipes.