Secure and testable scan design using extended de Bruijn graphs
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Secure scan design using shift register equivalents against differential behavior attack
Proceedings of the 16th Asia and South Pacific Design Automation Conference
A new scan attack on RSA in presence of industrial countermeasures
COSADE'12 Proceedings of the Third international conference on Constructive Side-Channel Analysis and Secure Design
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This paper proposes a secure scan design method whichprotects the circuits containing secret information such ascryptographic circuits from scan-based side channel attacks.The proposed method prevents the leakage of secretinformation by partial scan design based on a balancedstructure. We also guarantee the testability of both the designunder test and DFT circuitry, and therefore, realizeboth security and testability. Experiments for RSA circuitshows the effectiveness of the proposed method.