Secure and testable scan design using extended de Bruijn graphs

  • Authors:
  • Hideo Fujiwara;Marie Engelene J. Obien

  • Affiliations:
  • Nara Institute of Science and Technology, Kansai Science City, Nara, Japan;Nara Institute of Science and Technology, Kansai Science City, Nara, Japan

  • Venue:
  • Proceedings of the 2010 Asia and South Pacific Design Automation Conference
  • Year:
  • 2010

Quantified Score

Hi-index 0.00

Visualization

Abstract

In this paper, we first introduce extended de Bruijn graphs to design extended shift registers that are functionally equivalent but not structurally equivalent to shift registers. Using the extended shift registers, we present a new secure and testable scan design approach that aims to satisfy both testability and security of digital circuits. The approach is only to replace the original scan registers to modified scan registers called extended scan registers. This method requires very little area overhead and no performance overhead. New concepts of scan security and scan testability are also introduced.