Security for computer networks: an introduction to data security in teleprocessing and electronic funds transfer
Digital systems and hardware/firmware algorithms
Digital systems and hardware/firmware algorithms
Built-in test for VLSI: pseudorandom techniques
Built-in test for VLSI: pseudorandom techniques
Securing Designs against Scan-Based Side-Channel Attacks
IEEE Transactions on Dependable and Secure Computing
Secure and testable scan design using extended de Bruijn graphs
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Secure scan design using shift register equivalents against differential behavior attack
Proceedings of the 16th Asia and South Pacific Design Automation Conference
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A self-testing cryptographic coprocessing chip that provides high security for any data protected through its use is described. The design philosophy and chip architecture are examined. Detailed design and test methods and solutions are given, and it is explained why the chip's design interacts well in networks and with secure hard disks.