The Rational Unified Process: an introduction
The Rational Unified Process: an introduction
System Design with SystemC
Abstract State Machines: A Method for High-Level System Design and Analysis
Abstract State Machines: A Method for High-Level System Design and Analysis
UML for real
UML for hardware and software object modeling
UML for real
System-on-chip validation using UML and CWL
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A SoC Design Methodology Involving a UML 2.0 Profile for SystemC
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
A UML 2.0 profile for SystemC: toward high-level SoC design
Proceedings of the 5th ACM international conference on Embedded software
UML for SOC Design
A model-driven design environment for embedded systems
Proceedings of the 43rd annual Design Automation Conference
StateCharts to systemc: a high level hardware simulation approach
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Designing a Unified Process for Embedded Systems
MOMPES '07 Proceedings of the Fourth International Workshop on Model-Based Methodologies for Pervasive and Embedded Software
Formal techniques for SystemC verification
Proceedings of the 44th annual Design Automation Conference
Modelling systemc process behavior by the UML method state machines
RISE'04 Proceedings of the First international conference on Rapid Integration of Software Engineering Techniques
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Managing embedded systems complexity with aspect-oriented model-driven engineering
ACM Transactions on Embedded Computing Systems (TECS)
A SysML profile for development and early validation of TLM 2.0 models
ECMFA'11 Proceedings of the 7th European conference on Modelling foundations and applications
A model-driven engineering framework for embedded systems design
Innovations in Systems and Software Engineering
An executable semantics of the systemc UML profile
ABZ'10 Proceedings of the Second international conference on Abstract State Machines, Alloy, B and Z
Model-driven automation for simulation-based functional verification
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
An aspect-oriented, model-driven approach to functional hardware verification
Journal of Systems Architecture: the EUROMICRO Journal
Journal of Systems and Software
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This article summarizes our effort, since 2004 up to the present time, for improving the current industrial Systems-on-Chip and Embedded Systems design by joining the capabilities of the unified modeling language (UML) and SystemC/C programming languages to operate at system-level. The proposed approach exploits the OMG model-driven architecture—a framework for Model-driven Engineering—capabilities of reducing abstract, coarse-grained and platform-independent system models to fine-grained and platform-specific models. We first defined a design methodology and a development flow for the hardware, based on a SystemC UML profile and encompassing different levels of abstraction. We then included a multithread C UML profile for modelling software applications. Both SystemC/C profiles are consistent sets of modelling constructs designed to lift the programming features (both structural and behavioral) of the two coding languages to the UML modeling level. The new codesign flow is supported by an environment, which allows system modeling at higher abstraction levels (from a functional executable level to a register transfer level) and supports automatic code-generation/back-annotation from/to UML models.