Fast passivity verification and enforcement via reciprocal systems for interconnects with large order macromodels

Authors:
Dharmendra Saraswat;Ramachandra Achar;Michel S. Nakhla
Affiliations:
Department of Electronics, Carleton University, Ottawa, ON, Canada;Department of Electronics, Carleton University, Ottawa, ON, Canada;Department of Electronics, Carleton University, Ottawa, ON, Canada
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2007

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Abstract

With the ever increasing signal speeds, signal integrity issues of high-speed VLSI designs are presenting increasingly difficult challenges for state-of-the-art modeling and simulation tools. Consequently, characterization and passive macromodeling of high-speed modules such as interconnects, vias, and packages based on tabulated data are becoming important. This paper presents a fast algorithm for passivity verification and enforcement of large order macromodels of scattering parameter based multiport subnetworks. Numerous examples tested on this algorithm demonstrate a significant speed-up Compared to the existing algorithms in the literature.