Increasing NoC power estimation accuracy through a rate-based model

Authors:
Guilherme Guindani;Cezar Reinbrecht;Thiago R. da Rosa;Fernando Moraes
Affiliations:
PUCRS, Av. Ipiranga 6681, P. 32, Porto Alegre, Brazil;PUCRS, Av. Ipiranga 6681, P. 32, Porto Alegre, Brazil;PUCRS, Av. Ipiranga 6681, P. 32, Porto Alegre, Brazil;PUCRS, Av. Ipiranga 6681, P. 32, Porto Alegre, Brazil
Venue:
NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
Year:
2009

Citing 3
Cited 1

Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique

Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Energy-aware mapping for tile-based NoC architectures under performance constraints

ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
NoC Power Estimation at the RTL Abstraction Level

ISVLSI '08 Proceedings of the 2008 IEEE Computer Society Annual Symposium on VLSI

High performance NoC synthesis using analytical modeling and simulation with optimal power and minimal IC area

Journal of Systems Architecture: the EUROMICRO Journal

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Abstract

This research work presents and compares two NoC power estimation models, one based on the volume of information transmitted in the network, and another based on the transmission rates of each router.