Parallel supercomputing in MIMD architectures
Parallel supercomputing in MIMD architectures
Encyclopedia of graphics file formats (2nd ed.)
Encyclopedia of graphics file formats (2nd ed.)
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Parallel Queue Processor Architecture Based on Produced Order Computation Model
The Journal of Supercomputing
High-Level Modeling and FPGA Prototyping of Produced Order Parallel Queue Processor Core
The Journal of Supercomputing
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The integration technology has increased at the point where the development of Multi-Core processor architectures is a market reality nowadays. In this scenario, the interconnection network has a critical function when the number of cores increases, becoming impossible to use bus-based solutions. This paper approaches this problem with a new NoC-based architecture and a new computation mode. It proposes the utilization of network-onchip not only as an interconnection network but as well the processing datapath, which has great power of parallelism.