Behavioral synthesis of field programmable analog array circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Journal of Electronic Testing: Theory and Applications
Digital Window Comparator DfT Scheme for Mixed-Signal ICs
Journal of Electronic Testing: Theory and Applications
An On-Line Self-Testing Switched-Current Integrator
Proceedings of the IEEE International Test Conference
An Approach to the On-Line Testing of Operational Amplifiers
ATS '98 Proceedings of the 7th Asian Test Symposium
Mixed-signal circuits and boards for high safety applications
EDTC '95 Proceedings of the 1995 European conference on Design and Test
An Analog Checker with Dynamically Adjustable Error Threshold for Fully Differential Circuits
VTS '03 Proceedings of the 21st IEEE VLSI Test Symposium
On-Line BIST for Testing Analog Circuits
ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
Testing of Analogue Circuits via (Standard) Digital Gates
ISQED '02 Proceedings of the 3rd International Symposium on Quality Electronic Design
ISQED '03 Proceedings of the 4th International Symposium on Quality Electronic Design
A solution for the on-line test of analog ladder filters
VTS '95 Proceedings of the 13th IEEE VLSI Test Symposium
A Statistical Sampler for a New On-Line Analog Test Method
Journal of Electronic Testing: Theory and Applications
An Analog Checker with Input-Relative Tolerance for Duplicate Signals
Journal of Electronic Testing: Theory and Applications
Design ofWindow Comparators for Integrator-Based Capacitor Array Testing Circuits
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Analog checkers with absolute and relative tolerances
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper presents a novel window comparator circuit whose error threshold adjusts adaptively with respect to its input signal levels. Advantages of adaptive error thresholds over constant or relative error thresholds in analog testing applications are discussed. Analytical equations for guiding the design of the comparator circuitry are derived. The proposed comparator circuit has been designed and fabricated using a CMOS 0.18@mm technology. Measurement results of the fabricated chip are presented.