A Pipelined IP Address Lookup Module for 100 Gbps Line Rates and beyond

Authors:
Domenic Teuchert;Simon Hauger
Affiliations:
Institute of Communication Networks and Computer Engineering (IKR), Universität Stuttgart, Stuttgart, Germany 70569;Institute of Communication Networks and Computer Engineering (IKR), Universität Stuttgart, Stuttgart, Germany 70569
Venue:
EUNICE '09 Proceedings of the 15th Open European Summer School and IFIP TC6.6 Workshop on The Internet of the Future
Year:
2009

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Abstract

New Internet services and technologies call for higher packet switching capacities in the core network. Thus, a performance bottleneck arises at the backbone routers, as forwarding of Internet Protocol (IP) packets requires to search the most specific entry in a forwarding table that contains up to several hundred thousand address prefixes. The Tree Bitmap algorithm provides a well-balanced solution in respect of storage needs as well as of search and update complexity. In this paper, we present a pipelined lookup module based on this algorithm, which allows for an easy adaption to diverse protocol and hardware constraints. We determined the pipelining degree required to achieve the throughput for a 100 Gbps router line card by analyzing a representative sub-unit for various configured sizes. The module supports IPv4 and IPv6 configurations providing this throughput, as we determined the performance of our design to achieve a processing rate of 178 million packets per second.