Temperature reduction analysis in Sentry Tag cache systems

  • Authors:
  • Mostafa Farahani;Amirali Baniasadi

  • Affiliations:
  • Institute for Research in Fundamental Sciences (IPM), Tehran, Iran and Shahid Beheshti University, Tehran, Iran;Institute for Research in Fundamental Sciences (IPM), Tehran, Iran and University of Victoria, Victoria, British Columbia, Canada

  • Venue:
  • Proceedings of the 10th workshop on MEmory performance: DEaling with Applications, systems and architecture
  • Year:
  • 2009

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Abstract

Power and temperature management continue to impose challenging issues in high-performance processor design. Processor power density is growing and has made building efficient cooling systems expensive. While Dynamic Thermal Management (DTM) techniques aim at reducing cooling systems cost, previously suggested low-temperature design could potentially provide further temperature reductions or help DTM operate more effectively. Different processor components have different levels of impact on the overall temperature. Meantime, reducing the temperature of different processor components could result in both transient and steady temperature changes. In this paper, we study the temperature impact of exploiting Sentry Tag caches on cache temperature. We show that by using the Sentry Tag it is possible to reduce cache temperature effectively. In addition, we show that using Sentry Tag can impact transient temperature behavior which in turn enhances DTM efficiency.