Interconnection Networks: An Engineering Approach
Interconnection Networks: An Engineering Approach
Large Deviations for Small Buffers: An Insensitivity Result
Queueing Systems: Theory and Applications
Proceedings of the 2004 conference on Applications, technologies, architectures, and protocols for computer communications
Computers and Operations Research
Theory, Volume 1, Queueing Systems
Theory, Volume 1, Queueing Systems
Efficient routing with small buffers in dense networks
IPSN '05 Proceedings of the 4th international symposium on Information processing in sensor networks
Analysis and simulation of a model of multiprocessor networks
ACST'07 Proceedings of the third conference on IASTED International Conference: Advances in Computer Science and Technology
Interconnection networks with heterogeneous activity or finite buffers: beyond Jackson's theorem
Proceedings of the 11th communications and networking simulation symposium
Performance model of a multiprocessor interconnection network: theory and simulation
SpringSim '07 Proceedings of the 2007 spring simulaiton multiconference - Volume 1
Adaptive Channel Buffers in On-Chip Interconnection Networks— A Power and Performance Analysis
IEEE Transactions on Computers
Latency and saturation in networks with finite buffers
Proceedings of the 14th Communications and Networking Symposium
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There is a rise of interest in the performance of the networks with small buffers in recent years. Analysis showed that increase in buffer size does not improved the performance in wormhole routing significantly [1--4]. Moreover, latest research proved that use of smaller buffers does not decrease the link utilization [5] for Internet routers. In interconnection networks, buffer depth of 5 packets had been shown to offer optimal performance for optical packet-switched clockwork routing [6] The use of smaller buffer sizes give some advantage in speed and possibilities to use SRAM or OPS (Optical Packet Switching). We present theoretical models and numerical results for performance of a multiprocessor network modeled as a ring of routers with small finite buffers (size 1 and 2), and with local processors that generate messages with rate λ per time slot and two output ports/buffers. Simulation results are also obtained for networks with torus topology (four output ports, total buffer capacity of 8 and 20 messages). The average queue lengths and average latency are obtained. The results show that the model of independent queues, which is valid for networks with infinite buffers, is still applicable for small λ, but breaks down, which violates the Jackson theorem.