Equivalence of memory to "Random Logic"

Authors:
W. E. Donath
Affiliations:
IBM Thomas J. Watson Research Center, Yorktown Heights, New York
Venue:
IBM Journal of Research and Development
Year:
1974

Citing 1
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Abstract

A model of the design process for computer logic is used to estimate the number of bits of memory required to replace a so-called "random logic" circuit. The model can also be used to compare the respective time delays of array logic and random logic.