The evolution of IBM CMOS DRAM technology
IBM Journal of Research and Development - Special issue: IBM CMOS technology
Fundamentals of modern VLSI devices
Fundamentals of modern VLSI devices
Embedded DRAM technology opportunities and challenges
IEEE Spectrum
ZettaRAM: A Power-Scalable DRAM Alternative through Charge-Voltage Decoupling
IEEE Transactions on Computers
Circuit design for bias compatibility in novel FinFET-based floating-body RAM
IEEE Transactions on Circuits and Systems II: Express Briefs
Consistent and durable data structures for non-volatile byte-addressable memory
FAST'11 Proceedings of the 9th USENIX conference on File and stroage technologies
Hi-index | 0.01 |
Significant challenges face DRAM scaling toward and beyond the 0.10-µm generation. Scaling techniques used in earlier generations for the array-access transistor and the storage capacitor are encountering limitations which necessitate major innovation in electrical operating mode, structure, and processing. Although a variety of options exist for advancing the technology, such as low-voltage operation, vertical MOSFETs, and novel capacitor structures, uncertainties exist about which way to proceed. This paper discusses the interrelationships among the DRAM scaling requirements and their possible solutions. The emphasis is on trench-capacitor DRAM technology.