Development and attributes of z/Architecture

Authors:
K. E. Plambeck;W. Eckert;R. R. Rogers;C. F. Webb
Affiliations:
IBM Server Group, Poughkeepsie, New York;IBM Server Group, Boeblingen, Germany;IBM Server Group, Poughkeepsie, New York;IBM Server Group, Poughkeepsie, New York
Venue:
IBM Journal of Research and Development
Year:
2002

Citing 3
Cited 5

Case study: IBM's system/360-370 architecture

Communications of the ACM
Concepts of Enterprise Systems Architecture/370

IBM Systems Journal
Architecture of the IBM system/370

Communications of the ACM - Special issue on computer architecture

The IBM eServer z990 microprocessor

IBM Journal of Research and Development
Practical software reuse for IBM System z I/O subsystems

IBM Journal of Research and Development
The microarchitecture of the IBM eServer z900 processor

IBM Journal of Research and Development
Coupling I/O channels for the IBM eServer z900: reengineering required

IBM Journal of Research and Development
Design and microarchitecture of the IBM system z10 microprocessor

IBM Journal of Research and Development

Quantified Score

Hi-index	0.00

Visualization

Abstract

The IBM z/Architecture™ instruction set architecture (ISA) is an extension of the IBM Enterprise Systems Architecture/390® (ESA/390) ISA and features 64-bit general registers, 64-bit operations, and 64-bit virtual and real addressing. In addition, z/Architecture includes new instructions to optimize the handling of modern multi-byte character encodings and to improve the performance of programs written in high-level languages. It provides compatibility for ESA/390 application programs and increases the ease of development of new application programs. This paper presents an overview of the interesting aspects of z/Architecture and some of the associated decisions and tradeoffs made in its development.