Design and microarchitecture of the IBM system z10 microprocessor

Authors:
C.-L. K. Shum;F. Busaba;S. Dao-Trong;G. Gerwig;C. Jacobi;T. Koehler;E. Pfeffer;B. R. Prasky;J. G. Rell;A. Tsai
Affiliations:
IBM Systems and Technology Group, Poughkeepsie, New York;IBM Systems and Technology Group, Poughkeepsie, New York;IBM Entwicklung GmbH, Boeblingen, Germany;IBM Entwicklung GmbH, Boeblingen, Germany;IBM Entwicklung GmbH, Boeblingen, Germany;IBM Entwicklung GmbH, Boeblingen, Germany;IBM Entwicklung GmbH, Boeblingen, Germany;IBM Systems and Technology Group, Poughkeepsie, New York;IBM Systems and Technology Group, Poughkeepsie, New York;IBM Systems and Technology Group, Poughkeepsie, New York
Venue:
IBM Journal of Research and Development
Year:
2009

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Abstract

The IBM System z10™ microprocessor is currently the fastest running 64-bit CISC (complex instruction set computer) microprocessor. This microprocessor operates at 4.4 GHz and provides up to two times performance improvement compared with its predecessor, the System z9® microprocessor. In addition to its ultrahigh-frequency pipeline, the z10™ microprocessor offers such performance enhancements as a sophisticated branch-prediction structure, a large second-level private cache, a data-prefetch engine, and a hardwired decimal floating-point arithmetic unit. The z10 microprocessor also implements new architectural features that allow better software optimization across compiled applications. These features include new instructions that help shorten the code path lengths and new facilities for software-directed cache management and the use of 1-MB virtual pages. The innovative microarchitecture of the z10 microprocessor and notable differences from its predecessors and the IBM POWER6™ microprocessor are discussed.