Delay Testing of Digital Circuits by Output Waveform Analysis
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Circuit Failure Prediction and Its Application to Transistor Aging
VTS '07 Proceedings of the 25th IEEE VLSI Test Symmposium
Design for Resilience to Soft Errors and Variations
IOLTS '07 Proceedings of the 13th IEEE International On-Line Testing Symposium
A survey and taxonomy of on-chip monitoring of multicore systems-on-chip
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Voltage and frequency margins necessary to ensure correct processor operation under dynamic voltage, temperature, and aging variations result in performance and power overheads. Resilient circuit techniques, including embedded error-detection sequentials and tunable replica circuits, allow these margins to be reduced or eliminated, resulting in reliable, energy-efficient operation.