Optimal application mapping on NoC infrastructure using NSGA-II and microGA

Authors:
Marcus Vinícius Carvalho da Silva;Nadia Nedjah;Luiza de Macedo Mourelle
Affiliations:
Department of Electronics Engineering and Telecommunications, State University of Rio de Janeiro, Brazil;Department of Electronics Engineering and Telecommunications, State University of Rio de Janeiro, Brazil;Department of System Engineering and Computation, State University of Rio de Janeiro, Brazil
Venue:
INES'09 Proceedings of the IEEE 13th international conference on Intelligent Engineering Systems
Year:
2009

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Abstract

Network-on-chip (NoC) are considered the next generation of communication infrastructure, which will be omnipresent in most of industry, office and personal electronic systems. In the platform-based methodology, an application is implemented by a set of collaborating intellectual properties (IPs) blocks. In this paper, we use multi-objective evolutionary optimization to address the problem of mapping topologically pre-selected sets IPs, which constitute the set of optimal solutions that were found for the IP assignment problem, on the tiles of a mesh-based NoC. The IP mapping optimization is driven by the area occupied, execution time and power consumption.