Fault-tolerant computer system design
Fault-tolerant computer system design
Tight Bounds on the Size of Fault-Tolerant Merging and Sorting Networks with Destructive Faults
SIAM Journal on Computing
SIAM Journal on Computing
A Fault-Tolerant Merge Sorting Algorithm
COCOON '02 Proceedings of the 8th Annual International Conference on Computing and Combinatorics
Optical Fault Induction Attacks
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Experimental evaluation of the fail-silent behaviour in programs with consistency checks
FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
Using Memory Errors to Attack a Virtual Machine
SP '03 Proceedings of the 2003 IEEE Symposium on Security and Privacy
Fault tolerant data structures
FOCS '96 Proceedings of the 37th Annual Symposium on Foundations of Computer Science
Deterministic computations on a PRAM with static processor and memory faults
Fundamenta Informaticae
Sorting and searching in the presence of memory faults (without redundancy)
STOC '04 Proceedings of the thirty-sixth annual ACM symposium on Theory of computing
Soft Errors in Advanced Computer Systems
IEEE Design & Test
Proceedings of the 12th ACM conference on Computer and communications security
The price of resiliency: a case study on sorting with memory faults
ESA'06 Proceedings of the 14th conference on Annual European Symposium - Volume 14
SODA '07 Proceedings of the eighteenth annual ACM-SIAM symposium on Discrete algorithms
Algorithm-Based Fault Tolerance for Matrix Operations
IEEE Transactions on Computers
Exterminator: Automatically correcting memory errors with high probability
Communications of the ACM - Surviving the data deluge
Fault Tolerant External Memory Algorithms
WADS '09 Proceedings of the 11th International Symposium on Algorithms and Data Structures
Optimal resilient sorting and searching in the presence of memory faults
Theoretical Computer Science
On the importance of checking cryptographic protocols for faults
EUROCRYPT'97 Proceedings of the 16th annual international conference on Theory and application of cryptographic techniques
Optimal resilient dynamic dictionaries
ESA'07 Proceedings of the 15th annual European conference on Algorithms
Designing reliable algorithms in unreliable memories
Computer Science Review
Priority queues resilient to memory faults
WADS'07 Proceedings of the 10th international conference on Algorithms and Data Structures
Experimental study of resilient algorithms and data structures
SEA'10 Proceedings of the 9th international conference on Experimental Algorithms
Resilient algorithms and data structures
CIAC'10 Proceedings of the 7th international conference on Algorithms and Complexity
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The faulty memory RAM presented by Finocchi and Italiano [1] is a variant of the RAM model where the content of any memory cell can get corrupted at any time, and corrupted cells cannot be distinguished from uncorrupted cells. An upper bound, 驴, on the number of corruptions and O(1) reliable memory cells are provided. In this paper we investigate the fundamental problem of counting in faulty memory. Keeping many reliable counters in the faulty memory is easily done by replicating the value of each counter 驴(驴) times and paying 驴(驴) time every time a counter is queried or incremented. In this paper we decrease the expensive increment cost to o(驴) and present upper and lower bound tradeoffs decreasing the increment time at the cost of the accuracy of the counters.