Chameleon: a new multi-layer channel router
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Near-optimal n-layer channel routing
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
DAC '76 Proceedings of the 13th Design Automation Conference
A gridless multi-layer router for standard cell circuits using CTM cells
EDTC '97 Proceedings of the 1997 European conference on Design and Test
A general graph theoretic framework for multi-layer channel routing
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
Computing area and wire length efficient routes for channels
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
Two-layer bus routing for high-speed printed circuit boards
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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