A decidable temporal logic to reason about many processes
PODC '90 Proceedings of the ninth annual ACM symposium on Principles of distributed computing
Algorithms for scalable synchronization on shared-memory multiprocessors
ACM Transactions on Computer Systems (TOCS)
Reasoning about systems with many processes
Journal of the ACM (JACM)
Better verification through symmetry
Formal Methods in System Design - Special issue on symmetry in automatic verification
Exploiting symmetry in temporal logic model checking
Formal Methods in System Design - Special issue on symmetry in automatic verification
Formal Methods in System Design - Special issue on symmetry in automatic verification
Advanced compiler design and implementation
Advanced compiler design and implementation
Verifying Systems with Replicated Components in Mur&b.phiv;
Formal Methods in System Design
An Embedded Software Primer
A New Approach for the Verification of Cache Coherence Protocols
IEEE Transactions on Parallel and Distributed Systems
Bebop: A Symbolic Model Checker for Boolean Programs
Proceedings of the 7th International SPIN Workshop on SPIN Model Checking and Software Verification
Symmetric Symbolic Safety-Analysis of Concurrent Software with Pointer Data Structures
FORTE '02 Proceedings of the 22nd IFIP WG 6.1 International Conference Houston on Formal Techniques for Networked and Distributed Systems
State space reduction based on live variables analysis
Science of Computer Programming - Special issue on static analysis (SAS'99)
Symmetry in temporal logic model checking
ACM Computing Surveys (CSUR)
Context-aware counter abstraction
Formal Methods in System Design
Symmetry reduction for probabilistic model checking using generic representatives
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
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We present an improved approach to verifying systems involving many copies of a few kinds of components. Replication of this type occurs frequently in practice and is regarded a major source of state explosion during temporal logic model checking. Our solution makes use of symmetry reduction through counter abstraction. The efficiency of this approach directly depends on the size of the components' local state space, which is exponential in the number of local variables. We show how program analysis can significantly reduce the local state space and can help towards a succinct BDD representation of the system. Our reduction techniques synergistically combine into efficient symbolic verification, as documented by promising experimental results.