Prototype design of cluster-based homogeneous multiprocessor system-on-chip

  • Authors:
  • Luo-Feng Geng;Duo-Li Zhang;Ming-Lun Gao;Ying-Chun Chen;Gao-Ming Du

  • Affiliations:
  • Institute of VLSI Design, Hefei University of Technology, Hefei, China;Institute of VLSI Design, Hefei University of Technology, Hefei, China;Institute of VLSI Design, Hefei University of Technology, Hefei, China;Institute of VLSI Design, Hefei University of Technology, Hefei, China;Institute of VLSI Design, Hefei University of Technology, Hefei, China

  • Venue:
  • ASID'09 Proceedings of the 3rd international conference on Anti-Counterfeiting, security, and identification in communication
  • Year:
  • 2009

Quantified Score

Hi-index 0.00

Visualization

Abstract

The Multiprocessor System-on-Chip (MPSoC) is a promising solution for future complex computer and embedded systems. And, the Network-on-Chip (NoC) has been proposed as the future on-chip interconnection. Whereas, the NoCs bring more challenge on parallel programming and synchronization of different processor cores. This paper proposes a new cluster-based homogeneous MPSoC architecture, which adopts the hybrid interconnection composed of both bus-based and NoC architecture. This architecture has been implemented as a prototype by FPGA device, which integrates 17 processor cores. The performances of this prototype are evaluated under two real applications, matrix chain multiplication and JPEG picture decoding. The speedup ratio of this prototype is up to 15.850.