UML 2.0 Profile for Embedded System Design
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
Performance evaluation of UML software architectures with multiclass Queueing Network models
Proceedings of the 5th international workshop on Software and performance
UML-based multiprocessor SoC design framework
ACM Transactions on Embedded Computing Systems (TECS)
Performance estimation of distributed real-time embedded systems by discrete event simulations
EMSOFT '07 Proceedings of the 7th ACM & IEEE international conference on Embedded software
A framework for system-level modeling and simulation of embedded systems architectures
EURASIP Journal on Embedded Systems
Evaluating the model accuracy in automated design space exploration
Microprocessors & Microsystems
EURASIP Journal on Embedded Systems - C-Based Design of Heterogeneous Embedded Systems
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
MARTE profile extension for modeling dynamic power management of embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
Journal of Electrical and Computer Engineering - Special issue on ESL Design Methodology
Hi-index | 0.00 |
This article presents an efficient method to capture abstract performance model of streaming data real-time embedded systems (RTESs). Unified Modeling Language version 2 (UML2) is used for the performance modeling and as a front-end for a tool framework that enables simulation-based performance evaluation and design-space exploration. The adopted application meta-model in UML resembles the Kahn Process Network (KPN) model and it is targeted at simulation-based performance evaluation. The application workload modeling is done using UML2 activity diagrams, and platform is described with structural UML2 diagrams and model elements. These concepts are defined using a subset of the profile for Modeling and Analysis of Realtime and Embedded (MARTE) systems from OMG and custom stereotype extensions. The goal of the performance modeling and simulation is to achieve early estimates on task response times, processing element, memory, and on-chip network utilizations, among other information that is used for design-space exploration. As a case study, a video codec application on multiple processors is modeled, evaluated, and explored. In comparison to related work, this is the first proposal that defines transformation between UML activity diagrams and streaming data application workload meta models and successfully adopts it for RTES performance evaluation.