Instruction merging to increase parallelism in VLIW architectures

Authors:
Guillermo Payá-Vayá;Javier Martín-Langerwerf;Florian Giesemann;Holger Blume;Peter Pirsch
Affiliations:
Institute of Microelectronic Systems, Leibniz Universität Hannover, Hannover, Germany;Institute of Microelectronic Systems, Leibniz Universität Hannover, Hannover, Germany;Institute of Microelectronic Systems, Leibniz Universität Hannover, Hannover, Germany;Institute of Microelectronic Systems, Leibniz Universität Hannover, Hannover, Germany;Institute of Microelectronic Systems, Leibniz Universität Hannover, Hannover, Germany
Venue:
SOC'09 Proceedings of the 11th international conference on System-on-chip
Year:
2009

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Abstract

This paper describes a new mechanism for concurrent use of more functional units, without increasing the control path of a generic VLIW architecture. The proposed approach only requires small modifications in the architecture and a new code selection function in the instruction scheduler. The key idea of this approach is to search for similar independent operations inside a basic assembler code block and merge them in a single instruction, which executes the same operation with even and odd operand registers in two different functional units. A comprehensive evaluation of this mechanism with two multimedia tasks shows an improvement of the dynamic instructions-per-cycle, exceeding the theoretical maximum of the reference architecture.